Per Gunnar Kjeldsberg
Bakgrunn og aktiviteter
Per Gunnar Kjeldsberg was born in Trondheim, Norway in 1966. He received his Sivilingeniør degree (MSc) in electrical engineering in 1992 from the Norwegian Institute of Technology (NTH). In 2001 he received the degree of Doktor ingeniør (PhD) from the same institution (now Norwegian University of Science and Technology, NTNU). Between 1992 and 1996 he worked as a design engineer at the company Eidsvoll Electronics AS. Kjeldsberg is now Professor at Department of Electronic Systems, NTNU, currently on a one year research stay at School of Computer Science and Engineering, University of New South Wales, Sydney, Australia, as Visting Professorial Fellow. His research interests are embedded heterogeneous multi-processor systems, with a focus on multi-media and digital signal processing applications. He has participated in several national and international research projects, among them several EU Horizon 2020 projects, being work package leader in the FET-HPC project READEX and principal researcher in the LEIT project Tulipp. Currently he is supervisor in the MSCA-IF project Palmera. Kjeldsberg is Senior Member of IEEE and member of HiPEAC, a Eurpean Network of Excellence on High Performance and Embedded Architecture and Compilation. At NTNU Kjeldsberg is affiliated with the Circuit and Radio Systems group and project leader for a strategic research initiative on Energy Efficient Computing Systems, one of seven groups selected to receive special support towards EU’s research program Horizon 2020. Throughout his career, Kjeldsberg has cooperated closely with imec, in Leuven, Belgium, where he has been visiting researcher for nine months in all. He has also been visiting researcher at University of California, Irvine, Center for Embedded Computer Systems, and at imec Netherlands at the Holst Centre in Eindhoven. Kjeldsberg has published extensively at conferences and in journals, and has been coauthor of three books in his fields of interest. At NTNU he teaches both undergraduate and graduate courses, and supervises a number of students at master and PhD level. Kjeldsberg is and has been a member of the board of directors both at the Faculty and in private companies. He is frequently used as reviewer for several international journals and conferences.
Vitenskapelig, faglig og kunstnerisk arbeid
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- (2018) Runtime Precomputation of Data-Dependent Parameters in Embedded Systems. ACM Transactions on Embedded Computing Systems. vol. 17 (3).
- (2018) Techniques for dynamic hardware management of streaming media applications using a framework for system scenarios. Microprocessors and microsystems. vol. 56.
- (2018) Algorithm/Architecture Co-optimisation Technique for Automatic Data Reduction of Wireless Read-Out in High-Density Electrode Arrays. ACM Transactions on Embedded Computing Systems. vol. 17 (3).
- (2017) Energy Efficiency Effects of Vectorization in Data Reuse Transformations for Many-Core Processors—A Case Study. Journal of Low Power Electronics and Applications. vol. 7 (1).
- (2017) The READEX formalism for automatic tuning for energy efficiency. Computing. vol. 99 (8).
- (2016) Integrated exploration methodology for data interleaving and data-to-memory mapping on SIMD architectures. ACM Transactions on Embedded Computing Systems. vol. 15 (3).
- (2014) Exploration of energy efficient memory organisations for dynamic multimedia applications using system scenarios. Design automation for embedded systems.
- (2014) Realization of dynamical electronic systems. The European Physical Journal Conferences. vol. 70.
- (2013) Performance and Power Efficiency Analysis of Data Reuse Transformation Methodology on Multicore Processor. Lecture Notes in Computer Science (LNCS). vol. 7640.
- (2009) Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study. Lecture Notes in Computer Science (LNCS). vol. 5657.
- (2009) Power Optimization of Parallel Multipliers in Systems with Variable Word-length. Lecture Notes in Computer Science (LNCS). vol. 5349.
- (2008) Storage Estimation and Design Space Exploration Methodologies for the Memory Management of Signal Processing Applications. Journal of Signal Processing Systems. vol. 53 (1-2).
- (2008) Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications. Journal of Signal Processing Systems. vol. 53 (3).
- (2007) Switching Activity Reduction of MAC-Based FIR Filters with Correlated Input Data. Lecture Notes in Computer Science (LNCS). vol. 4644.
- (2007) Incremental hierarchical memory size estimation for steering of loop transformations. ACM Transactions on Design Automation of Electronic Systems. vol. 12 (4).
- (2007) Bit-Width Constrained Memory Hierarchy Optimization for Real-Time Video Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. vol. 26 (4).
- (2006) Destructive-Read in Embedded DRAM, Impact on Power Consumption. Journal of Embedded Computing.
- (2006) Polyhedral space generation and memory estimation from interface and memory models of real-time video systems. Journal of Systems and Software. vol. 79 (2).
- (2004) Storage requirement estimation for optimized design of data intensive applications. ACM Transactions on Design Automation of Electronic Systems. vol. 9.
- (2003) STOREQ: STOrage REQuirement Estimation and Optimization tool for Data Intensive Applications. ERCIM News. vol. 52 (January 2003).