Capacitor performance limitations in high power converter applications

High voltage low inductance capacitors are used in converters as HVDC-links, snubber circuits and sub model (MMC) capacitances. They facilitate the possibility of large peak currents under high frequent or transient voltage applications. On the other hand, using capacitors with larger equivalent series inductances include the risk of transient overvoltages, with a negative effect on life time and reliability of the capacitors. These allowable limits of such current and voltage peaks are decided by the ability of the converter components, including the capacitors, to withstand them over the expected life time. In this paper results are described from investigations on the electrical environment of these capacitors, including all the conditions they would be exposed to, thereby trying to find the tradeoffs needed to find a suitable capacitor. Different types of capacitors with the same voltage ratings and capacitances where investigated and compared a) on a component scale, characterizing the capacitors transient performance and b) as part of different converter applications, where the series inductance plays a role. In that way, better insight is achieved on how the capacitor construction can affect the total performance of the converter.


Introduction
Global wind power growth is foreseen to continue in the future with development of large-scale wind power plants (WPPs) located far offshore and with a need for HVDC as export connection. Integration of these WPPs to the onshore grids will develop from point-to-point connections to a transnational multi-terminal network where the transmission capacity which serves both to export the wind power and to facilitate power trading between countries. In such a situation, application of multi-terminal VSC-HVDC transmission is considered the favorable technological solution due to the multiple advantages it provides (active/reactive power control, long distance transmission, etc.). A control strategy which is capable of accommodating different dispatch schemes is however required [1]. Introducing such a system to the grid necessitates the investigation of its behavior in normal conditions but more importantly in anomalous conditions, when various types of faults occur. These faults cause situations where transients can affect the converter. To get a better understanding of the effects of these transients we need to better comprehend the converter components and how they can be characterized. In this paper the modular multilevel converter will be subject for our investigation but the same theory can be used in other topologies as well. The main components of a modular multilevel converter are the submodules, each of which consists of 2 IGBT's (T1 and T2) with a diode located in anti-parallel and a capacitor C as shown in figure 1. The submodule can attain two different states, being either turned on or turned off. The definition of a turned on sub module is when the T1 is on and current is being conducted through the submodule capacitor. Thereby the voltage across T2 will be equal to the capacitor voltage. When the submodule is turned off, T2 is conducting, and T1 has stopped conducting, therefore the current will be bypassing the submodule capacitor and the submodule will be seen as a short circuit. For this work, we will try to highlight the characteristics of the submodule capacitor C and the importance of having a correct representation of it in later work to get the correct influence of faults on the converter. The size of the capacitor is a very important factor in its performance and for selection of a suitable size, different aspects has to be considered. Switching actions in the converter unit will introduce a ripple in the direct voltage. In order to minimize the ripple in the dc voltage, large submodule capacitors are required. The capacitor also needs to be able to withstand the maximum voltage and current which might occur. However, application of large submodule capacitors results in slower changes of the dc voltage in respond to changes in power exchanged at the dc side of the converter. This will result in a slower discharging of the submodule capacitors if the dc voltage is reduced. On the other hand, application of a small submodule capacitor results in fast response to changes in instantaneous power exchanged but at the expense of larger ripple in the dc voltage and more capacitors are needed to accumulate for the submodule voltage. Thus, the total capacitance of the submodule capacitors can be approximated by [2].
Where V rip is the allowable peak to peak voltage ripple and I AVG is the average current conducting through the capacitor in half a period. The submodule capacitor cannot simply be modeled as an ideal capacitor, as this component besides the capacitance also includes some inductance known as, leakage inductance, parasitic inductance or as the Equivalent Series Inductance (ESL), which is mainly caused by the leads and internal connections used to connect the capacitor plates or foils to the outside environment. It is obvious that the ESL will first start to matter at high frequencies, in particular at the resonance frequency formed together with the capacitor. The resistance known as the Equivalent Series Resistance (ESR) covers the physical series resistance in the capacitor (e.g. the ohmic resistance of the leads and plates or foils). Including all parasitic components, the model of the submodule capacitor looks as seen in figure 2 [3]. Due to this reason and the fact that we want to include the effects of the capacitor in transient condition, we have chosen to perform a FRA (frequency responds analysis using a gain/phase analyzer) of these submodule capacitors [4]. From the results of the FRA, we use the Gaussian elimination theory to separate ESR, ESL and C in the important frequencies.
Gaussian elimination is the well-known method of solving a linear system Ax = b which consist for m equations for n unknowns [5]. The augmented matrix can be seen below in figure 3. Transformed into triangular form can be seen below.

Fig 4: Triangular form of the augmented matrix
The forward elimination will indicate if there is any solution for the system and if so, we use back substitution to find the solution for the particular system. This method is used in our work to separate the three individual components by finding three points from the measured impedance curve and assuming linearity between these points. Very small time steps might cause considerable variations within small frequency changes. For this reason, a reasonable approximation is applied to the measured data to get a smoother and more linear curve. Figure 5 shows a typical result, clearly illustrating the capacitive behavior at lower frequencies and the inductances dominating at higher frequencies. The Gain/phase analyzer gives a complex number for each frequency as modulus and argument ∠ . Using these three points we can setup three equations with three unknowns.
Having the augmented matrix, the inverse matrix A -1 is computed to extract the individual component values. It should be noticed from equation (6) that the capacitance will be computed as the inverse capacitance. Due to the fact that R, L and C are changing with changing frequency, the points need to be close enough to make sure that the change is very small. On the other hand, the change of impedance with frequency has to be sufficiently high in order to allow for solving the linear equation system.

Evaluating different capacitors
As mentioned before, the size of the capacitor will have great influence on its behavior for several reasons. From the resonance frequency 0 = 1 √ we know that as higher the capacitance as lower the resonance frequency. Nevertheless with smaller resonance frequencies, new challenges appear having in mind that relatively low frequency transients might occur. Thus, more distortion will arise at the converter legs when such transients are induced. In figure 6 we see the frequency responses of various capacitors with different capacitance and voltage ratings. As assumed, the resonance frequencies of the capacitor with higher capacitance can be found at lower frequencies. Nevertheless, taken a closer look at the results, we see that the resonance frequencies of capacitors with high voltage ratings and capacitance actually have a lower value than expected. This is due to the physical size of large capacitors. At larger physical sizes, most electrolytic capacitors are basically a large coil of flat wire, with a higher inductance than it would be if it was a flat construction. This inductance, along with the small amount of inductance from the wire leads, will make up the ESL of the capacitor and bigger capacitors usually mean more layers in both wound and stacked capacitors, resulting in an increase of the parasitic inductance. The enlarged ESL will consequently cause a low resonance frequency.
[6]. For further investigation of this behavior, three capacitors are chosen and through Gaussian elimination we separate the equivalent components to see how they are behaving separately. Looking at figure 7, it can be confirmed from the inductance behavior that as bigger the capacitors as larger is the parasitic inductance. This can also be seen from table 1 that the big capacitors have more than twice the equivalent inductance. From the upper graph we can see that the resistance at very low frequencies will fall, but from around 100Hz it will slowly start to increase, as expected due to the skin effect. We notice that at the low frequencies, we are not able to obtain correct values of the inductance. And at the high frequencies more reasonable values for the inductance can be extracted, whereas the capacitance values on the other hand becomes improbable. Around the resonance frequency we actually get acceptable values for both components. This phenomenon does not occur when the method is used together with mathematically generated impedances, which we used for verification of the method In Matlab we created the same type frequency response as assumed for a real capacitor. We varied the resistance with the frequency to represent skin effect, meanwhile we also varied the inductance since the skin effect will affect this as well, due to change of internal inductance. But as it is seen from figure 8 we were able to obtain all values within all frequencies with a very small error margin. This indicates that our method is working as expected. Nevertheless, we have to consider the accuracy of the measuring tool, we are using to obtain the impedance sweeps. It could be the bottleneck, since it has some limitations especially at the edges.

Conclusion
The work of this paper has presented a simple way of evaluating capacitor for converter usage. FRA measurement has been done for various types of capacitor to indicate which types that is best in this context. It has been shown that by using Gaussian elimination separation between Equivalent Series Inductance (ESL), and Equivalent Series resistance (ESR) and C is possible. This gives a good starting point in connection with converter design for a specific environment. The present work allows for improving component models and implementing the results in an EMTDC simulation tool to futher investigate the capacitor behavior in transient conditions.